SGI: Hardware

hi guys
do you know the memory layout of the EISA bus of Indigo2 ?
i mean which addresses are opened to the EISA bus from the point view of the CPU

i'd like to to realize a custom board to be plugged into the backplane, figured to be handled by linux, and in order to achieve such a purpose i need to know which address are allowed

also, do you know if the backplane perform both mem_io and dev_io ?

let me know

http://techpubs.sgi.com/library/tpl/cgi ... /ch18.html

DevDriver_PG wrote: EISA Address Mapping
The pages of EISA I/O address space are mapped to physical addresses 0x0001 0000 (slot 1) through 0x0004 0000 (slot 4). The 112 MB of EISA memory address space is mapped to physical addresses between 0x000A 0000 and 0x06FF FFFF. Addresses in these ranges can be mapped into the kernel address space for PIO or for DMA (see “Kernel Functions for EISA Support”).

I have written IRIX device drivers professionally. The device driver programmer's guide is some 1100 pages and even then there are some things which are simply not documented or unexpected and/or which require some assistance from and SGI engineer. That is a bit of a problem, these days since SGI doesn't support IRIX anymore (unless maybe if you're related to the US defense apparatus and have serious money to spend). But the basics (initialization, memory mapped IO, interrupts) work mostly like your average Linux/UNIX.

Thank you for your answer. Nice to know that SGI has dropped =( Linux should be a bit easier at both kernel and userspace side, btw i am also thinking about realizing an easier ISA8bit board, it could work and it will cost 1/2 vs the EISA (i mean the PCB will be less couplex and smaller, services are happy to make you pay for PCB area and their cooking time). I have to understand if it will work, and if it will not, i have to really think about design a full EISA instead of ISA8. The hardware prototype is a spartan3e-500 FPGA with level shifter buffer and external ram. Pretty good for DSP acceleration purposes.

Vector Electronics used to make an EISA prototyping board, the part number was 4619-3, I looked around and mouser and allied know what it is but don't have any in stock, and digikey and newark didn't know what it was. Picture (from octopart.com):

i got this informations

ISA/EISA IO:
0x0008.0000 - 0x0008.FFFF

ISA/EISA MEM:
0x000A.0000 - 0x07FF.FFFF
0x8000.0000 - 0xFFFF.FFFF

@vishnu
i have already realized a very cheap ISA8bit prototype, never tried yet into the EISA bus but I wouldn't expect any problems, it should just work good, slower just because 8 bit instead of 32bit, btw, it's simpler, so i think it will be my first try.

i want to use spartan3e fpga plus a few level shifter, 3.3V <-> 5V, just implementing an easy "echo" buffer polling I/O driven, well, i prefer interrupt-driven I/O versus polling I/O, but … i have to proceed step by step from the easiest choice

vishnu wrote: Vector Electronics used to make an EISA prototyping board...

That board in the picture is either PCI or MCA, but definitely not EISA!

robespierre wrote:

vishnu wrote: Vector Electronics used to make an EISA prototyping board...

That board in the picture is either PCI or MCA, but definitely not EISA!

I had a sneaking suspicion that might be the case! Nonetheless Vector does make, or at least used to make, a prototype board like that for EISA, but since nobody seems to have one in stock it's probably more likely that they used to make them...